Please check the document. This is the code I was using but it’s not working according to the requirements.
library ieee;
use ieee.std_logic_1164.all;
ENTITY traffic IS
PORT(
CLK,SW0 : IN BIT;
LIGHTS : OUT STD_LOGIC_VECTOR(5 DOWNTO 0));
END traffic;
ARCHITECTURE circuit OF traffic IS
TYPE STATE_TYPE IS (S0, S1, S2, S3);
SIGNAL state : STATE_TYPE;
SIGNAL count : integer range 0 to 5;
CONSTANT SEC5 : integer range 0 to 5 := 5;
CONSTANT SEC1 : integer range 0 to 5 := 1;
BEGIN
PROCESS (CLK,SW0)
BEGIN
IF (SW0 = ‘0’) THEN
IF(CLK’EVENT AND CLK = ‘1’) THEN
CASE state IS
WHEN S0 =>
IF count < SEC5 THEN
state <= S0;
count <= count + 1;
ELSE
state <= S1;
count <= 0;
END IF;
WHEN S1 =>
IF count < SEC1 THEN
state <= S1;
count <= count +1;
ELSE
state <= S2;
count <= 0;
END IF;
WHEN S2 =>
IF count < SEC5 THEN
state <= S2;
count <= count + 1;
ELSE
state <= S3;
count <= 0;
END IF;
WHEN S3 =>
IF count < SEC1 THEN
state <= S3;
count <= count + 1;
ELSE
state <= S0;
count <= 0;
END IF;
WHEN others =>
state <= S0;
END CASE;
END IF;
END IF;
END PROCESS;
C2: PROCESS (state)
BEGIN
CASE state IS
WHEN S0 => LIGHTS <= “001100”;
WHEN S1 => LIGHTS <= “010100”;
WHEN S2 => LIGHTS <= “100001”;
WHEN S3 => LIGHTS <= “100010”;
WHEN others => LIGHTS <= “001100”;
END CASE;
END PROCESS;
END circuit;


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