there are four labs but we have to do one things with this 4 labs. 1 and 2 are to design. lab 3 and 4 are to implement. I just wanna pass, pls help. Dont take it if you have no experience with system verilog.
Here is the general flow/preview on how all 4 labs work together:
- In Lab 1, you are going generate your assembly instructions and binary conversions for each of your assembly instructions for your ISA.
- In Lab 2, you are going to design the processor in SystemVerilog. This consists of ALUs, Control Units, Memory Units, etc. connected to each other.
- In Lab 3, you are going to design an assembler that converts the Assembly code you generate in Programs 1, 2, and 3 to binary.
- In Lab 4, you are going to use the binary code generated by your assembler in lab 3 to test your processor design.


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