For this lab you will be looking at the RISC-V instruction set covered in chapter four of your textbook.

You will need to complete of the following questions and show all work when necessary. All solutions need to by either typed or written neatly and easy to read (No sloppy hand written solutions will be graded) and submitted to Canvas by the due date or will be subjected to the penalties outlined in the syllabus. We encourage collaboration, however, you must submit your own original work must be submitted and cheating will not be tolerated. Your solutions will need to follow strict adherence to the RISC-V coding style. This means that you your solutions should be case sensitive, if commenting, make sure you use // to represent the commented section. A new line will be associated with a new line of code and use of indentation is needed to separate label, instructions, and registers (both destination and source).

Material required:

https://github.com/TheThirdOne/rars

8098/~giorgi/WebRISC-V/index.php”>http://x.dii.unisi.it:8098/~giorgi/WebRISC-V/index…

Textbook: David A. Patterson and John L. Hennessy, Computer Organization and Design RISC-V Edition: The Hardware Software Interface (The Morgan Kaufmann Series in Computer Architecture and Design) 1st Edition, 2017, ISBN-13: 978-0128122754.

http://home.ustc.edu.cn/~louwenqi/reference_books_…

RISC-V Pipelines

1)

(1pts) 1. If on average a RISC-V architecture has the following times for each stage, what will the pipeline clock cycle need to be to ensure a balanced pipeline?

2)

(1pts) 2. If we assume a pipeline has forwarding, determine if the given code segments can be prop- erly executed without stalls?

(.25 pts) 2.a

RAW Dependencies, Forwarding, and Code Scheduling

(4pts) 3. For the following questions consider the code segment below.

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(1 pts) 3.a List all the RAW hazards caused by data dependencies from the code above. Solutions should be written in the form of (instruction #1, instruction #2, register)

(.5 pts) 3.b If we assume no forwarding, how many stalls are needed to ensure the code is executed correctly.

(.5 pts) 3.c If we assume forwarding, how many stalls are needed to ensure the code is executed correctly.

(1 pts) 3.d Assume forwarding is implemented, create a a scheduling chart for the code segment above. Use (stall) if you need to add a bubble to the pipeline.

(1 pts) 3.2 Use Code scheduling to rearrange the code above to eliminate the needed stalls.

Branch Prediction

(4pts) 4. For the following questions consider the code segment below.

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(1 pts) 4.a List all the RAW hazards caused by data dependencies from the code above. Solutions should be written in the form of (instruction #1, instruction #2, register)

(1 pts) 4.b If we assume a static prediction of Branch Not Taken what will be the next instruction fetched after the branch instruction?

(.5 pts) 4.c Under the same assumptions in (b), after the first iteration of the loop, will the predic- tion be correct? If not, what iteration will it be a correct prediction?

(1 pts) 4.d If we assume a static prediction of Branch Taken what will be the next instruction fetched after the branch instruction?

(.5 pts) 3.e Under the same assumptions in (d), after the first iteration of the loop, will the predic- tion be correct? If yes, what iteration will it be an incorrect prediction?