THIS LAB REQUIRES TO BE DONE IN MULTISIM
EE 310 Electronic Circuit Design I
Experiment 7
Introduction to the Transistor
Note:
The entirety of this lab is to be competed in Multisim.
Introduction
During the first half of the 20
th
century
electronic circuits were constructed with
vacuum tubes, essentially little glass bottles
with glowing filaments that were difficult to
miniaturize. Circuits consisted of a few, or
at most a few tens of tubes. Today, the
semiconductor revolution ha
s resulted in
displacement of the vacuum tube and in its
place we have integrated circuits that
contain
billions
of devices in a very small
area. All of this was made possible by the
invention of the transistor, a solid
-state
device that is constructed out
of common
materials like silicon. Inventors John
Bardeen (L), William Shockley (Seated),
and Walter Brattain (R) from Bell Labs
were awarded the Nobel Prize in Physics in
1956 for their revolutionary device, first
called the “Crystal Triode”.
Before la
unching off into the design of a
multi-billion transistor circuit, we need to
start with something more basic. Therefore,
in this lab experiment we will investigate
the characteristics of a single transistor used
in a basic type of circuit known as the
common
–
emitter
stage. Single device
transistor circuits are the building blocks of
circuit design and the common-emitter (CE)
stage is the most useful of the three basic
configurations. (Common -base and
common
-collector are the other two.)
Therefore it is i
mportant to have a clear
understanding of the common-emitter
configuration. We will be investigating both large
-signal and small
-signal features of the common emitter
stage, which are applicable to switching circuits and amplifying circuits, respectively.
The first transistor invented by the Bell Labs team was a
Point
Contact Transistor
made from a single crystal of n
-type
germanium. Many of today’s devices are
Bipolar Junction
Transistors
(BJT) made from silicon. They contain two different
types of semiconductor material, p
-type and n-type, and have two
pn junctions.
For this experiment we will be using a 2N3904 silicon npn
transistor
in multisim
. You can find it in Select a component >
BJT_NPN > 2N3904.
While the Bell Labs transistor was about 15 mm tall, the 2N3904
die
measures 0.43 by 0.33 mm, and is 0.23 mm thick. The package
is considerably larger, measuring 5 by 5 by 4 mm. Keep in mind
that
this is a relatively large device by today’s standards.
The First Transistor
2N3904 Die
Package
Pinout
The 2N3904 is a general
-purpose transistor having a fairly large breakdown voltage (
BV
CBO
and
BV
CEO
),
and it is appropriate for
amplifier applications. The device is not intended for fast logic because it has
relatively large capacitance and stores considerable charge when saturated.
To understand the device better, get a copy of its data sheet and study it carefully before starting the
experiment. If this is your first experience with the transistor, you will find many unfamiliar terms in a
transistor data sheet. As we progress through EE 310, many of these terms will become more familiar to
you.
When describing transistor
amplifiers we often simultaneously apply both DC (bias) and ac (signal)
voltages. Thus, the equations describing the voltages, currents, and powers in a transistor circuit contain
both DC and ac terms. In order to keep them sorted out, this lab exercise fo
llows the symbol convention
found in Sedra/Smith [1]. For example, the total instantaneous base
-emitter voltage
v
BE
is described by:
v
BE
=
V
BE
+
v
be
where
V
BE
is the DC bias term and
v
be
is the small
-signal ac term.
This experiment consists of three tasks, which are described on the pages that follow.
EE 310 Experiment 7
2
Experimental Procedure
1. Large
-Signal Voltage Transfer Characteristic
The purpose of this part of the experiment is to observe the large
-signal input
-output characteristics of a
typical common emitter stage. You should be aware that amplifiers and some other small
-signal
applications use only a portion of the resulting chara
cteristics
—namely, the region where the slope of the
v
CE
versus
v
BE
curve is steep. However, the rest of the characteristics are important to the proper operation
of logic circuits and switches. In these regions the output voltage is essentially independent of input
voltage variations. This feature permits the use of noisy inputs without altering the output state. It should
also be pointed out that large
-signal circuits, such as logic gates, must pass through the “small
-signal”
region whenever the output st
ate has to be changed. Therefore, designers of digital circuits cannot ignore
the small
-signal phenomena encountered in the linear region.
Refer to Fig. 1 for a schematic of the test circuit.
a.
Let
R
1
=
R
2
=
R
and let
R
3
=
R
/8.
b.
Choose a value for
R
to obtain a Thévenin equivalent resistance of 100 Ω for the base drive
circuit.
c.
Pick
R
C
= 10 kΩ.
d.
Set
V
DC
= 0 (replace it with a short
-circuit).
e.
Set
v
ac
to be a 20-V p
-p triangle wave at about 50 Hz.
V
CC
=+
15V
R
C
R
2
V
DC
2N3904
v
CE
~
v
ac
v
BE
R
3
Base drive circuit
Fig. 1
– Common Emitter Test Circuit
Observe both
v
BE
and
v
CE
simultaneously with the default 2 channel oscilloscope in multisim (Not
Tektronix oscilloscope)
. After you get the circuit running (
v
CE
will be a fluctuating voltage), switch the
oscilloscope to the
x
–
y
mode
(A/B button at the bot
tom left of the oscilloscope window in multisim.
If you cannot see this button, you are using the wrong oscilloscope!)
. Put
v
BE
on the
x
-channel and
v
CE
on the
y
-channel. The resulting display is a representation of the transfer characteristics of the CE stage.
Save a p
lot
your result and from the plot, determine the following:
f.
The active, cutoff, and saturation regions.
g.
The gain
dv
CE
/
dv
BE
when
v
CE
is near zero volts.
h.
The gain when
v
CE
is near its maximum value
i.
The gain when
v
CE
is in the middle of its range (
v
CE
=
V
CC
/2)
EE 310 Experiment 7
3
R
1
R
3
2. Large
-Signal Transient Response
The purpose of this task is to observe the transient response of the CE stage. Switch the
v
ac
signal source
(Default Function Generator in Multisim, not Agilent function generator)
from triangle to square
wave (at about 50 kHz) and let
V
DC
remain at zero. Set up the oscilloscope to simultaneously measure
both
v
ac
and
v
CE
in the time domain
(Y/T
button at the bottom left of the oscilloscope window in
multisim. If you cannot see this button, you are using the wrong oscilloscope!)
. Set
v
ac
to be just
large enough to drive
v
CE
from saturation to cutoff. Notice that the rise time is quite different from the
fall time. Plot your result, including a measurement of both the rise time and fall time of
v
CE
.
Slow rise time and fast fall time is ty
pical of the CE large
-signal transient response. Finite rise and fall
times are caused by circuit and device capacitances. Some of the capacitance comes from the BJT itself
and some of it comes from the wiring and any circuits tied to the load, including your oscilloscope probe.
The fall time is quite fast because there is an abundance of collector current available to quickly discharge
the load capacitance into the BJT and pull
v
CE
downward toward ground. However, the rise time is slower
because when the B
JT cuts off, the only source of current available to pull the collector voltage up is from
the resistor
R
C
. Since the resistor is usually quite large, it cannot rapidly charge the collector load parasitic
capacitance, so
v
CE
rises up rather slowly.
From y
our observed waveform, the knowledge that the 10–
90% rise time of a single-pole
RC
circuit
equals 2.2
RC
and the known value of
R
C
, calculate the total capacitance that is apparent at the collector
of the transistor.
3. Small
-signal Characteristics of a CE Stage
The purpose of this task of the experiment is to look more closely at the portion of the
v
BE
–
v
CE
characteristic where the slope is large. It is this region where it is possible to have large voltage gain.
This, of course, is very important in the design of small
-signal amplifier stages.
Small-signal Voltage Gain
The first choice that must be made i
s to decide exactly where to operate along the
v
BE
–
v
CE
curve. Two
factors are important:
•
Bipolar transistor current gain
β
is somewhat collector current dependent. We want to operate the
transistor near its optimum (maximum)
β
-value. Look up this paramete
r on the data sheet and find
the optimum collector bias current (at +25 °C, in this case).
•
The collector voltage excursions can be rather large. We want to avoid clipping at both
extremes of the output voltage swing. Therefore
it is logical to try to center the DC collector
voltage operating point
V
CE
near the middle of its range, that is, near
V
CC
/2. This may not be the
region where the large signal trace is steepest. However, we will use an overriding design goal
that the DC operating point be equal to
V
CC
/2.)
Therefore, select
R
C
so that the optimum dc collector current will flow when the dc collector voltage is
V
CC
/2. Then remove the short that had been placed across
V
DC
and install the variable DC power supply.
Adjust the base bias voltage
V
DC
until the DC collector voltage is close to
V
CC
/2. (The ac signal is to be
zero in this step.)
EE 310 Experiment 7
4
a.
Record your
R
C
value.
b.
Record the dc collector voltage measurement
V
CE
.
(Use
the default
multimeter in multisim
).
Set up the oscilloscope to display both
v
BE
and
v
CE
in the time domain
(Y/T button)
. Set the ac
function
generator
to a 1
-kHz triangle wave and gradually increase
v
ac
until the collector voltage begins to clip.
Try to get the collector voltage
v
CE
to barely clip at both extremes by making slight adjustments to both
V
DC
and
v
ac
. This clipping action will not be a “sharp
” transition. Instead as the transistor enters
saturation, you may observe a gradual distortion of the wave shape.
c.
Reduce the amplitude of the input signal so that the output signal has a 1-volt peak-to
-peak value.
Measure the “small
-signal” ac voltage gain, which is
v
ce
(the ac portion of
v
CE
) divided by
v
be
(the
ac portion of
v
BE
). Also plot your result (waveforms showing AC superimposed on DC values) for
this case.
Pre
-lab Assignment
•
Calculate the Thévenin equivalent circuit for the base drive source
in Fig. 1.
Let
R
1
=
R
2
=
R
and let
R
3
=
R
/8. Select the resistors to obtain a Thévenin resistance of 100 Ω.
(Use the closest standard resistance values.)
•
From the 2N3904 device characteristics determine the dc collector current that would give the
optimum (highest) common-emitter current gain,
β
(or
h
FE
). In this case, use the
+25 °C value.
•
Calculate the collector resistor
R
C
that will give a dc collector
bias voltage of
V
CC
/2, (where
V
CC
=
+15 V), and also result in the optimum dc collector current as determined in step 2) above.
•
A sufficiently large ac voltage applied to the base of the transistor will result in collector voltage
clipping at both
voltage extremes.
o
Explain what will cause clipping at the most positive excursion of the collector voltage.
o
Explain what will cause clipping at the least positive excursion of the collector voltage.
Note: This pre
-lab assignment is to be completed before the start of the
lab.
Please send a copy of your
answers to the leading TA(s)
of your lab section on CANVA
S.
Reporting Requirements
Note:
Attach a screenshot of your assembled circuit in multisim
to your report
along with screenshots
of
all oscilloscope plots and multimeter readings
while uploading to canvas. Compile everything in a single
pdf file if possible.
This is a one
-session experiment. Keep a record of all laboratory in your notebook. Make it descriptive
enough that another engineer would be able to duplicate your work. Be observant as you collect your
data to compare relative quantities and to draw conclusions about the specific properties of each
experiment. In the analysis section, develop relevant expressions and compare these calculated values
with the experimental results. Answer the questions posed in this laboratory assignment. Finally, include
a summary of the experiment in your concluding remarks, explaining what was learned and presenting
an overview of results.
EE 310 Experiment 7
5
Appendix
– 2N3904 Device Data Sheet
The latest version of the 2N3904 data sheet can be found at http://www.onsemi.com/
Reference
[1]
Adel S. Sedra, Kenneth C. Smith, Microelectronic Circuits, Oxford University Press, 7 edition (2014), ISBN
-13
978-
0199339136.
EE 310 Experiment 7
6
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