I have had another tutor on studypool create the program, To me, this program doesn’t make sense. Please look at it and see if it works and why don’t I see it work when I import it in a new project. as well as make a final report about this program for the professor. as well as a report for me so I can understand the code, for I will have to present this code and with a good understanding and show that the project works, I understand how Cordic works, I want to know how this program works. A drawn diagram aswell please.
for the professor’s report:
Projects must be written in Verilog, include comments, and be indented. The code must written solely by you except where the code is clearly annotated and source(s) cited if you use code you did not write yourself. You should always include comments and other support materials as required to document your project so that another designer (and your instructor!) can understand how it does what it does. Your final submission must be modular (Top level plus any other modules), and broken into logical chunks. You should not put many pages of code in one module!
NOTE that all the source code .v modules and test bench file(s) you wrote and any other required files MUST be pasted into the report document AND submitted as separate files so that your code can be synthesized and simulated – submit all that are required so that we can reproduce your results, otherwise we will not consider the project as fully functional!!
Your report MUST be submitted here on Bb as a single .DOC .DOCX or .PDF report file format, plus all your source files. (Please submit separate files, individually. Please do not zip/compress the report document into a combined file.)
Your Student Project Final Report should be essentially the “what” and “how” if your project:
- You must define what you did and how you implemented the project. This report must define the “what” and “how”:
- You must document it to define what your project does (==a technical specification) and how you will implement it (==the top level design). You also need to explain how you verified that it works (design validation using a test bench).
- The results of the testing, as well as how you tested to see that it works as specified must also be included.
- List all the individual modules written, tests, and approximately how many hours it took to complete each one.
Specifically, your project final report must be turned in here on Blackboard and must include the following items in .doc .docx or .pdf format report:
- Introductory paragraph summarizing the items below. High level description of your project.
- High level design in block diagram form, showing the major module inputs, outputs, processes and how they interact. (NOT at the gate level unless that’s the only way to explain it!)
- A descriptive paragraph for each top level function explaining what’s in it and how it works.
- All COMMENTED source code for each module in Verilog any other files (memory initialization, .coe, etc.) used to create your project.
- Specific tool set used (i.e.: Vivado, edaplayground.com, or ?)
- Notes on anything else we need to know to synthesize and simulate using your test bench(es).
- Test results. List the testbenches/tests you ran, results, and project limitations. Make note of any bugs, or unresolved remaining issues.
- Include the following files: ONE .doc, .docx, or .pdf format file with EVERYTHING including source code pasted into ONE report document.
- Attach all your source files separately: source file types include *.v modules, test bench files, plus anything else (tables, etc.) that would be required for me to reproduce your results.
- List any special items you used in your design (schematics, IP cores, etc.) and include citations for code you did not write yourself.
- (This is optional and NOT recommended!) and only IF your project was implemented in hardware: Documentation of any special items (hardware schematics, wiring, photos, etc.) orscreen capture of demonstration or a link to a youtube video demonstration of your project in action.
- What you would do differently if you had time.
- Conclusion
- Hours spent on the project
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