Complete both activities listed that construct a memory using smaller memory chips, and also show the organization within the smaller memory chips. Feel free to post videos instead of figures if it is easier to narrate how the circuits are constructed / designed.
Complete both of the following:
- Construct an W x D memory, where W is either {4K, 8k, 16k} and D is either {16, 24, 32} using a smaller memory chip that is of size L x M where L is one of {256, 512, 1K, 2K} and M is one of {1, 2}. In particular be sure to show how many of the smaller memory chips are required, how big any decoders / multiplexors that you use are and how/where the address bits and data bits of the W x D are connected to the smaller L x M memory chips in the design.
- Show what the organization of the memory inside your smaller L x M memory chip looks like. In particular how big is the squarish memory array, how big are the decoder / multiplexor and where are the address bits and data bits connected within the design.
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