Class of Microcomputers II at a University needs to design a computer system with an 8-bit address bus,
an 8-bit data bus and it uses isolated VO. It has:
- 128 bytes of EPROM starting at address 00H (H meaning in hexadecimal) constructed using 64×4 chips;
- 64 bytes of RAM constructed using 16×8 chips;
- an input device with a READY signal at address ABH;
- an output device with a READY signal at address CDH;
- a bidirectional input/output device with no READY signal at address EFH.
Please show the complete design for this system. (Choose an appropriate starting address for the RAM by yourself, and use a decoder to enable memory chips.) include all enable and load logic.
Note: Points will be given by evaluating the following components:
(1) Memory chips and structure (25%);
(2) Memory chips decoder (25%);
(3) Input & outpr.tt devices and their enable logic (25oh);
(4) Data bus and other wire connections (25% in which 5% is fbr the width of the connection wire between all pairs of components).


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